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2/17/2020 10:36:48 AM
Making hardware easy for software developers
5G Mobile Network,FPGA,Developer Hardware
App Developer Magazine
Making hardware easy for software developers


Making hardware easy for software developers

Monday, February 17, 2020

Richard Harris Richard Harris

We chat with Ramine Roane, vice president of AI and software at Xilinx about why they believe making hardware easy for software developers is key to driving today’s greatest innovations.

Emerging developments in everything from 5G and autonomous cars to the latest in scientific research are requiring hardware that can reliably, rapidly and efficiently perform unique tasks and can be adapted to meet changing standards and specifications.

In this article, Ramine Roane, vice president of AI and software at Xilinx, discusses how new and existing adaptable silicon technologies are becoming more accessible to the broader developer community through unified software platforms and how they are enabling the most exciting technological advancements today to move forward even faster.

ADM: What’s driving the increased and broader adoption of FPGAs into new verticals and market segments?   

Roane: In short: data and computational needs continue to grow exponentially, while CPU performance has stalled. The end of CPU frequency scaling (Dennard’s scaling) pushed CPU makers to move multi-core architectures, essentially moving the scaling problem from silicon improvements to software. However, Amdahl’s law severely limits the acceleration efficiency for multi-threaded software. This, combined with the slowdown of density and cost scaling (Moore’s law), is preventing processor architectures to keep up with the computational needs to handle current workloads. Performance scaling is now coming from Domain-Specific Architectures (DSA). FPGAs empower companies to accelerate their applications on hardware that can adapt, on the fly, to the right DSA.

ADM: What benefits/advantages do field-programmable gate arrays (FPGAs) and the new category of adaptive compute acceleration platform (ACAP) devices offer that GPUs and ASICs don’t, and what needs do they fill? 

Roane: Adaptive platforms (FPGA & ACAP) apply to a wide variety of workloads, from wired and wireless communications, medical and life sciences, industrial applications, transportation, computing in the cloud and at the edge including AI, big data analytics, quantitative finance, video transcoding, etc. CPUs have run out of steam for these workloads, while GPUs only apply to a small subset of these workloads. Moreover, the same adaptive platform can be reprogrammed on the fly to accelerate different, unrelated workloads. In data centers, this allows for a simple but adaptable architecture that can handle any type of workload on the fly.

ADM: Where do FPGA advantages lie for AI: training or inference? What markets and use cases are more relevant? 

Roane: Xilinx is focusing on inference. The advantage of adaptive hardware in AI include low latency, high performance, and low power inference. This results from network-optimized accelerators built on adaptive hardware — with custom dataflow and procession as well as custom memory hierarchy — minimizing the access to external memory and thus maximizing the computational efficiency. High-performance inference at low latency and low power is relevant in automotive (ADAS, AD), industrial, scientific and medical applications, as well as in data centers.

ADM: How is FPGA/ACAP programming becoming easier and more accessible to a broader range of developers? 

Roane: FPGA programming tools used to be designed for hardware designers, using complex hardware description languages, which are also very slow to simulate and debug. Xilinx has developed tools for software developers and AI scientists to be able to use adaptive hardware with very little knowledge of hardware. We recently launched the free Vitis unified software platform to remove this hurdle for the broader developer community. For software developers, this opens up new career paths and capabilities to leverage their existing skillsets while helping accelerate projects with faster development times and easier application of adaptive platform solutions. 

ADM: What is the learning curve for a developer with no hardware experience look like when using a platform like Vitis? Can you share any examples of how the new platform accelerates development time? 

Roane: The learning curve for Software and AI developers should be fairly short, as they use standard languages, libraries and Frameworks in the Vitis and Vitis AI software platforms. As an example, for smart vision applications, developers will be using C++ with OpenCV libraries (developed and accelerated by Xilinx), and compile their TensorFlow output onto our DNN accelerator DSA, using Vitis AI.

ADM: What tech trends do you see a growing a need for developers to move more into hardware? Which industries are most impacted? Will there still be a different skillset required between software and hardware development in the future? 

Roane: The use of hardware accelerators in exploding in automotive, communication infrastructure, but also in industrial and medical applications. Data Centers also have a scaling problem with the amount of hardware needed for applications such as video transcoding and processing, big data and database analytics, security and soon AI inference. In terms of skillset, we clearly see that there is an increasing number of software and AI scientists coming out of universities and relatively much less hardware developers. 

ADM: Where do you see open-source solutions playing a role in the future of developer platforms? 

Roane: Open Source has been adopted already by the software communities across most industries. Not only it provides security by transparency, but it’s also a way to accelerate development and quality by leveraging the expertise of millions of developers around the world. Even hardware development is moving to that model, with open-source hardware projects. DARPA is the biggest sponsor of this type of project.

Ramine Roane vice president of AI and software at Xilinx

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